FV-1 clock module mod

How would one modify this circuit to allow a lower clock speed? I want to play around with the lower limit to find the point of bit-crusher-like sounds but not cause it to lock up. In it's stock form it doesn't seem to go low enough to do this.
 
I ran an external pot on this build, but you might want to just go with the original module trimmer, and keep inmight the size of your enclosure mounting the module like I did won’t work in all cases. It’s an easy mod give it a go. And there configure info in the build doc for the module that specifies what to omit.
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Nice! Yes, I too went with an externally-mounted pot. It is up and running fine but I wondered if i need to change a specific resistor to lower the lower clock speed limit.
 
Looking at the schematic, I am guessing that I want to replace R2 with a lower value in order to decrease the clock rate's lower limit. Am I right to think that at maximum resistance 14k7 (R2 4k7 + FREQ 10k), we get maximum clock speed (pot turned full CW)? So if I put a 5k trimmer pot (wired as a variable resistor/rheostat) in place of R2 I could find a safe lower resistance/lower clock speed limit?
I believe this would also lower the maximum clock speed but I am okay with that.


Edit: I believe I had it backwards: a similar oscillator circuit is discussed here: https://www.eleccircuit.com/ic-4049-clock-pulse-generator/ and after checking the function of the pot in my build, at full CW (faster clock speed) the resistance at the pot is 0, at full CCW it is 10 kOhm (slower clock speed). So the greater the resistance, the slower the clock speed, which can be confirmed with the formula, F = 1/1.39xRxC described in the link. In that case, I believe it would be better to increase the value of the pot/variable resistor.
I am unsure how the R1 (10k) resistor comes into play with this formula as it sits between C1 and IC1. According to the Spin site, this exact circuit should allow for clock speeds between 20 and 60 kHz (http://www.spinsemi.com/knowledge_base/xtal.html).
 

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Sorry I misunderstood your question, and a good question it is… maybe someone with more knowledge can chime in on it.
 
No, because the clock freq depends on the threshold of the first gate and that has a large tolerance. CMOS RC oscillators are by their very nature imprecise.
 
I swapped out the 10k pot for a 50k pot with a 47k resistor between lugs 1 & 3 to approximate a 24k pot. This allows me to bring the clock speed much lower and, in my testing, the FV-1 remains operational. The sound from the Hydra is significantly more lofi with max delay times around 4 seconds. The maximum clock speed is unchanged. I am not sure how much lower it can go but I am happy with the results I got.
 
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