Do We Need/Want a BBD Tester?

[Cybercow]

OK, I was able to get some testing time in and found that it does work for the MN30xx series.
And please note that I corrected my comment above - #56

When I tried an MN3102 and an MN3207 I get no sound. Toggle is in the correct position. Haven't measured any voltages yet cuz I was too excited to share what I found so far. More info as it arrives.

EDIT - 9:13pm May 30, 2025
Since burning up one clock chip already, note that the above mentioned test with the MN3102/MN3207, I had power applied for only a moment to do a quick test. After getting no sound from three attempts at getting sound thru the MN3102/MN3207 test, I swapped things back over to test the MN3101/MN3007 chipset and got sound. So I reversed the setup again back to the MN3102/MN3207 test and got no sound. I did NOT unplug the power this time. And by the time I reached over for my DMM probes and brought them to the test board, the MN3102 clock chip opened a small fissure and belched out the tiniest puff of smoke.

With now two burned up clock chips, I figure it's time for me to take break from it this weekend and start fresh on Monday.

FWIW, I know all of my clock and BBD chips are good because I successfully tested them in working circuits. They're too expense to not test for fakes. Still, I'm OK with sacrificing a couple towards this goal. The outcome might benefit the pedal building community.

 

[NickKUK]

I've done some work with 24MHz clocks and destroyed a Crystek CCHD clock before (ouch!) to reflections, so some things to check if it's all connected right:

* current draw limiting - what's the current draw through the clock pins,
* reflections - do you have any impedance changes creating a reflection back to the clock. Terminating resistor may be needed.
* power ground movement - I see that many of the ground planes are grounded through the IC ground pins themselves and not with vias.
* return current - that low impedance path could be through the IC rather than the
* oscilation - complex coupled paths that loop back to the power/power ground through the other chips.

You could put a signal generator to generate clock (no IC present) then put a scope on the same pins. The scope would then pick up the reflections etc. Worth also using the scope on the other pins to see if they're all picking up radiated EMI.
An alternative is splitting using a Schmitt trigger to buffer and isolate, such as an i2s isolator chip. That provides galvanic isolation but supports the clock rate (it even separates the power rails), such as this I used a MAX14434FAWE (https://www.analog.com/MAX14434/datasheet) in a i2S/C isolator.

The beauty is in this technique is that the buffer is less sensitive to faults or fraud chips (this is a tester after all!). It prevents the majority of problems listed.

I used a clock spanning chip that acts both as a buffer and a clock splitter (the J2/3/4 are mini bnc connectors):

This is what it ended up like: