Chuck D. Bones
Circuit Wizard
Replacing the pull-down resistor is not about improving the gain of an emitter follower, it's about improving the linearity and output swing. Imagine the usual emitter-follower circuit where R4 & Q3 are gone and Q2 is replaced with a 10K resistor to -Vcc. The gain is still extremely close to unity. The more Q1's collector current (Ic) changes when the signal swings from positive to negative, the more distortion we get. The idling Ic with a 10K pull-down to -9V is around 840μA. At that current, Q1's output impedance (Zo) is around 30Ω. With no load downstream of C3, the gain is 10K / (10K+30) = 0.997. If we apply a 1Vp-p signal, Ic will change by 100μAp-p or about 12.5%. That means Zo also changes by 12.5%. To a first-order approximation, the distortion is 0.03%. Not audible, barely measureable. If we start loading Q1, or increasing the signal level, or both, then the delta Ic increases and that causes the distortion to increase. We could reduce the relative delta Ic simply by increasing the DC Ic.
It's more efficient to replace the emitter pull-down resistor with a current source and choose a current that is significantly higher than the AC load current. That's what the designer did in the circuit above.
The only problem with that circuit is the matching, or lack thereof, of Q2 & Q3. If Q2 and Q3 are matched for Vbe and HFE at the desired DC current, then Q3's collector current will be very close to the current in R4. But if the two transistors are mismatched, then Q3's Ic could be significantly higher or lower than R4's current. This type of current mirror works very well inside an opamp because the transistors on the same die can be matched to very high precision. What the designer should have done was to put a resistor between Q2-E and -Vcc and another resistor between Q3-E and -Vcc. Those two resistors will help enforce tracking between Q2 & Q3, even if the transistors themselves are not matched.
It's more efficient to replace the emitter pull-down resistor with a current source and choose a current that is significantly higher than the AC load current. That's what the designer did in the circuit above.
The only problem with that circuit is the matching, or lack thereof, of Q2 & Q3. If Q2 and Q3 are matched for Vbe and HFE at the desired DC current, then Q3's collector current will be very close to the current in R4. But if the two transistors are mismatched, then Q3's Ic could be significantly higher or lower than R4's current. This type of current mirror works very well inside an opamp because the transistors on the same die can be matched to very high precision. What the designer should have done was to put a resistor between Q2-E and -Vcc and another resistor between Q3-E and -Vcc. Those two resistors will help enforce tracking between Q2 & Q3, even if the transistors themselves are not matched.
