Chuck D. Bones
Circuit Wizard
Part 2 - Potentiometers & Harmonic Structure
This time around we'll look at the classic Big Muff Pi circuit. This circuit model is based on the Violet Ram's Head schematic I found on Kit Rae's site. There are tons of mods and variants of the Big Muff circuit, so it's a good one to have in your circuit library.
Another opportunity to practice you schematic drawing skills with this circuit. Hint: draw the 2nd stage first, then copy it twice; once to make the 1st stage and once to make the 3rd stage. Just hit the Copy button and then draw a box around all the stuff you want to copy. Then delete the extra parts from the 1st stage. Go ahead, I'll wait...
Potentiometers
In part 1, the GAIN potentiometer had only two terminals. This time, we're simulating all three terminals on the pots. Look at R_sust1 and R_sust2. These two resistors make up the SUSTAIN control. The top of R_sust1 is pin 3. The junction of R_sust1 and R_sust2 is pin 2 and the bottom of R_sust2 is pin 1. We use parameters to specify the resistance or each leg. The parameter S represents the % of pot rotation. When S = zero, the pot is fully CCW. When S = 1, the pot is fully CW. The total pot resistance is 100K. Again, I added 1 to each formula to prevent the resistance from going to zero because SPICE chokes on zero Ohm resistors. The TONE pot is constructed in a similar fashion. For now, the STEP PARAM statements are commented out. SUSTAIN is set to 50% (noon) and TONE is set to 30% (10 o'clock). There's not much point in modeling the VOLUME control as a potentiometer since all it does is make the output signal smaller. Instead, we'll dime the VOLUME pot (R_vol) and model it as a single 100K resistor.
The .TRAN statement tells LTSpice to run the simulation for 500ms, but don't store any data for the first 100ms. We're doing it that way because whenever a transient analysis starts, it's common for the waveforms to be a little uneven until the average DC voltage across all of the capacitors settles down. We want a large record of a uniform waveform so we can look at the harmonic structure. Vin is set to make a constant amplitude 100mV peak, 500Hz sinewave.
Notice that I labeled 5 nodes: stage1, stage2, stage3, stage4 and out. This will make it easier to talk about where we're probing. All of the other nodes are auto-numbered n001, n002, etc. LTSpice assigns node number as you draw, so depending on how you drew the schematic, chances are the node numbers will be different for the ones on my schematic. Naming the nodes removes any ambiguity.
Hit the RUN button. First, we'll take a quick look at the bias points for all four transistors. Hover over the stage1 label. The DC operating point will be around 4.1V. If you specified a different transistor part number, the bias point will be a little different. Now look at stage2. We have the same DC operating point as stage1 because the we have the same transistor part number and the same biasing resistor values as stage1. In a real circuit they won't be exactly the same due to component tolerances. Stage3's bias point is slightly lower because some of the current thru R11 is bled off to ground thru R8, R5 and the TONE pot. Stage4's bias point is a little higher at 4.9V because the biasing resistors are different. We just did a quick sanity check on the circuit. If the bias point is off, then there is a drawing error that needs to be corrected before we can proceed.
Click on stage1 and a waveform will appear in the plot window. Zoom in on it and you'll see a sinewave with a tiny bit of distortion. The first stage is a clean boost, but the input impedance is non-linear so we get a wee bit of distortion. Nothing compared to what comes next.
Delete the stage1 waveform, click on stage2 and zoom in. Now we see some distortion! D3 and D4 are clipping the waveform more-or-less symmetrically. It's not perfectly symmetric because Q3 does not drive the diodes symmetrically.
Delete the stage2 waveform, click on stage3 and zoom in. Now we see the characteristic BMP clipping. The waveform is tilted because C7 does not allow D1 & D2 to clip all of the low freq signal.
Delete the stage3 waveform, click on stage4 and zoom in. We see more-or-less the same waveform as stage3 with some tone shaping from the Tone control network. Notice that for all of the waveforms we've observed, the signal does not get anywhere near 0V or 9V. The transistors are not saturating; the diodes are doing all of the clipping.
Harmonic Structure
The purpose of a dirt pedal is twofold: provide compression and change the harmonic structure. Let's look at the harmonics. Click on the plot window to make sure it's the active window. Now click View on the toolbar and then FFT in the drop-down menu. A list of all of the circuit's voltages and currents pops up. Double-click on V(out), it's the second entry on the list. Now we see a plot of signal level vs. frequency. Let's adjust the scales. Put the cursor over the horizontal scale and the cursor will change to a ruler. Right-click. Un-check the Logarithmic box, change Left to 0, tick to 500 and Right to 5K. Hit OK. Now we see the first 10 harmonics. Let's adjust the vertical scale. Right-click over the vertical scale and set top to 0dB (should already be 0dB), tick to 10dB, Bottom to -80dB and hit OK.
Your plot will look like this:
The vertical line on the left is the 500Hz fundamental (aka 1st harmonic). The second line at 1KHz is the 2nd harmonic. The next line at 1.5KHz is the 3rd harmonic, and so forth. Notice that the odd harmonics are much more prominent than the even harmonics. 20dB represents a 10x ratio; 40dB is a 100x ratio. The 2nd harmonic is more than 40dB below the 3rd harmonic which means it's amplitude is less than 1% of the 3rd harmonic. Perfectly symmetric clipping produces only odd harmonics.
Let's turn up the TONE control and run it again. Change the .param T = 0.3 statement to read: .param T = 1 and hit Run again. The waveform on stage4 is now very spiky. The spectrum plot does not automatically update, so we have to click the plot window, click View, FFT and double-click V(out). Notice that the harmonics are all much stronger. The odd harmonics are almost as large as the fundamental.
We can easily make a Supa Tone Bender by disconnecting the diodes on the 2nd stage. Just delete the wire that connect C6 to the diodes D3 & D4. Reset the T parameter back to 0.3 and hit Run. Now when we look at the FFT we see the even harmonics are much more prominent. That's because without D3 & D4, the 2nd stage transistor is clipping asymmetrically.
Let's take a look at the frequency response. Reconnect C6 to the diodes. Put an asterisk in front of the .tran statement. Remove the asterisk from the .ac statement. Remove the asterisk from the .step param T 0 1 0.1 statement. This .step param statement is written for linear steps, which is appropriate because the TONE pot is B-taper. LTSpice can also do exponential steps for simulating A & C-taper pots. Hit Run. Now we see a family of freq response curves in the plot window. Right-click on the degree scale on the right and hit Don't plot phase and then hit ok. This is the overall small-signal freq response of the BMP for each setting of the TONE control from 0 to 10. If we just want to see what the TONE control is doing, we can edit the plot to show the freq response of just a part of the circuit. Right-click where is says V(stage4) at the top of the plot window. A dialog window pops up. Edit the text in the window to say: V(stage4)/V(stage3) and hit OK. The plot updates to show us the tone shaping that takes place between stage3 and stage4. The green trace is for TONE set to 0, the gray trace is for TONE set to 5 (noon) and the dark red trace is for tone set to 10. For extra credit, try altering C8 or C9 and run it again.
That's it for Part 2.
This time around we'll look at the classic Big Muff Pi circuit. This circuit model is based on the Violet Ram's Head schematic I found on Kit Rae's site. There are tons of mods and variants of the Big Muff circuit, so it's a good one to have in your circuit library.
Another opportunity to practice you schematic drawing skills with this circuit. Hint: draw the 2nd stage first, then copy it twice; once to make the 1st stage and once to make the 3rd stage. Just hit the Copy button and then draw a box around all the stuff you want to copy. Then delete the extra parts from the 1st stage. Go ahead, I'll wait...
Potentiometers
In part 1, the GAIN potentiometer had only two terminals. This time, we're simulating all three terminals on the pots. Look at R_sust1 and R_sust2. These two resistors make up the SUSTAIN control. The top of R_sust1 is pin 3. The junction of R_sust1 and R_sust2 is pin 2 and the bottom of R_sust2 is pin 1. We use parameters to specify the resistance or each leg. The parameter S represents the % of pot rotation. When S = zero, the pot is fully CCW. When S = 1, the pot is fully CW. The total pot resistance is 100K. Again, I added 1 to each formula to prevent the resistance from going to zero because SPICE chokes on zero Ohm resistors. The TONE pot is constructed in a similar fashion. For now, the STEP PARAM statements are commented out. SUSTAIN is set to 50% (noon) and TONE is set to 30% (10 o'clock). There's not much point in modeling the VOLUME control as a potentiometer since all it does is make the output signal smaller. Instead, we'll dime the VOLUME pot (R_vol) and model it as a single 100K resistor.
The .TRAN statement tells LTSpice to run the simulation for 500ms, but don't store any data for the first 100ms. We're doing it that way because whenever a transient analysis starts, it's common for the waveforms to be a little uneven until the average DC voltage across all of the capacitors settles down. We want a large record of a uniform waveform so we can look at the harmonic structure. Vin is set to make a constant amplitude 100mV peak, 500Hz sinewave.
Notice that I labeled 5 nodes: stage1, stage2, stage3, stage4 and out. This will make it easier to talk about where we're probing. All of the other nodes are auto-numbered n001, n002, etc. LTSpice assigns node number as you draw, so depending on how you drew the schematic, chances are the node numbers will be different for the ones on my schematic. Naming the nodes removes any ambiguity.
Hit the RUN button. First, we'll take a quick look at the bias points for all four transistors. Hover over the stage1 label. The DC operating point will be around 4.1V. If you specified a different transistor part number, the bias point will be a little different. Now look at stage2. We have the same DC operating point as stage1 because the we have the same transistor part number and the same biasing resistor values as stage1. In a real circuit they won't be exactly the same due to component tolerances. Stage3's bias point is slightly lower because some of the current thru R11 is bled off to ground thru R8, R5 and the TONE pot. Stage4's bias point is a little higher at 4.9V because the biasing resistors are different. We just did a quick sanity check on the circuit. If the bias point is off, then there is a drawing error that needs to be corrected before we can proceed.
Click on stage1 and a waveform will appear in the plot window. Zoom in on it and you'll see a sinewave with a tiny bit of distortion. The first stage is a clean boost, but the input impedance is non-linear so we get a wee bit of distortion. Nothing compared to what comes next.
Delete the stage1 waveform, click on stage2 and zoom in. Now we see some distortion! D3 and D4 are clipping the waveform more-or-less symmetrically. It's not perfectly symmetric because Q3 does not drive the diodes symmetrically.
Delete the stage2 waveform, click on stage3 and zoom in. Now we see the characteristic BMP clipping. The waveform is tilted because C7 does not allow D1 & D2 to clip all of the low freq signal.
Delete the stage3 waveform, click on stage4 and zoom in. We see more-or-less the same waveform as stage3 with some tone shaping from the Tone control network. Notice that for all of the waveforms we've observed, the signal does not get anywhere near 0V or 9V. The transistors are not saturating; the diodes are doing all of the clipping.
Harmonic Structure
The purpose of a dirt pedal is twofold: provide compression and change the harmonic structure. Let's look at the harmonics. Click on the plot window to make sure it's the active window. Now click View on the toolbar and then FFT in the drop-down menu. A list of all of the circuit's voltages and currents pops up. Double-click on V(out), it's the second entry on the list. Now we see a plot of signal level vs. frequency. Let's adjust the scales. Put the cursor over the horizontal scale and the cursor will change to a ruler. Right-click. Un-check the Logarithmic box, change Left to 0, tick to 500 and Right to 5K. Hit OK. Now we see the first 10 harmonics. Let's adjust the vertical scale. Right-click over the vertical scale and set top to 0dB (should already be 0dB), tick to 10dB, Bottom to -80dB and hit OK.
Your plot will look like this:
The vertical line on the left is the 500Hz fundamental (aka 1st harmonic). The second line at 1KHz is the 2nd harmonic. The next line at 1.5KHz is the 3rd harmonic, and so forth. Notice that the odd harmonics are much more prominent than the even harmonics. 20dB represents a 10x ratio; 40dB is a 100x ratio. The 2nd harmonic is more than 40dB below the 3rd harmonic which means it's amplitude is less than 1% of the 3rd harmonic. Perfectly symmetric clipping produces only odd harmonics.
Let's turn up the TONE control and run it again. Change the .param T = 0.3 statement to read: .param T = 1 and hit Run again. The waveform on stage4 is now very spiky. The spectrum plot does not automatically update, so we have to click the plot window, click View, FFT and double-click V(out). Notice that the harmonics are all much stronger. The odd harmonics are almost as large as the fundamental.
We can easily make a Supa Tone Bender by disconnecting the diodes on the 2nd stage. Just delete the wire that connect C6 to the diodes D3 & D4. Reset the T parameter back to 0.3 and hit Run. Now when we look at the FFT we see the even harmonics are much more prominent. That's because without D3 & D4, the 2nd stage transistor is clipping asymmetrically.
Let's take a look at the frequency response. Reconnect C6 to the diodes. Put an asterisk in front of the .tran statement. Remove the asterisk from the .ac statement. Remove the asterisk from the .step param T 0 1 0.1 statement. This .step param statement is written for linear steps, which is appropriate because the TONE pot is B-taper. LTSpice can also do exponential steps for simulating A & C-taper pots. Hit Run. Now we see a family of freq response curves in the plot window. Right-click on the degree scale on the right and hit Don't plot phase and then hit ok. This is the overall small-signal freq response of the BMP for each setting of the TONE control from 0 to 10. If we just want to see what the TONE control is doing, we can edit the plot to show the freq response of just a part of the circuit. Right-click where is says V(stage4) at the top of the plot window. A dialog window pops up. Edit the text in the window to say: V(stage4)/V(stage3) and hit OK. The plot updates to show us the tone shaping that takes place between stage3 and stage4. The green trace is for TONE set to 0, the gray trace is for TONE set to 5 (noon) and the dark red trace is for tone set to 10. For extra credit, try altering C8 or C9 and run it again.
That's it for Part 2.
