Proposition Distortion Low output.

Causefarley

New member
Hey guys! My build doesn’t seem to have vert much output. I am worried I have a short somewhere because for some reason I can inject a signal through the case of Q1 and C6. Has anyone ever come across this?and has anyone posted the voltages for this? Thanks y’all. I will get some pics up asap.
 
Hey guys! My build doesn’t seem to have vert much output. I am worried I have a short somewhere because for some reason I can inject a signal through the case of Q1 and C6. Has anyone ever come across this?and has anyone posted the voltages for this? Thanks y’all. I will get some pics up asap.
How low is your output? Are you able to at least get unity gain (same volume as bypassed)
 
No sir I cannot get unity gain. When I am using my signal tracer if I touch the case of the transistor or the case of c6 I hear the signal.
 

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What are the DC voltage readings at pin 8 of the opamps? And what is the voltage reading at pin 5 of IC3?

What specific JFET is being used? And what are the values of RB1 & RB2?

Also, how securely is the JFET seated in those sockets? To counter any issues with sloppy socket connections, I gently 'wrinkle" the ends of the legs.

Wrinkled_Leads.jpg
 
Working perfectly now! Turns out it was a bad solder connection on the transistor. No whistles and plenty of output. I really took my time when I initially soldered the components. Just goes to show how important it really is. Thanks for the help.
 
What are the DC voltage readings at pin 8 of the opamps? And what is the voltage reading at pin 5 of IC3?

What specific JFET is being used? And what are the values of RB1 & RB2?

Also, how securely is the JFET seated in those sockets? To counter any issues with sloppy socket connections, I gently 'wrinkle" the ends of the legs.

View attachment 70649
Awesome! I have been just adding a little solder to the leads but like this idea better. No heat on the components.btw the jfet is a 4339 and it actually worked great with the stock bias values.
 
Awesome! I have been just adding a little solder to the leads but like this idea better. No heat on the components.btw the jfet is a 4339 and it actually worked great with the stock bias values.
A 2N4339 is one of the optimal JFETs to use. Good. It should have a Vgs(Off) value of -1.00V (±0.05V) to work best with the stock bias resistor values.

Note that the JFET compression will have less affect as the Gain is turned up. IF you notice that, then the Vgs(Off) value is good for the bias resistor values.

Glad you sorted it out.
 
What are the DC voltage readings at pin 8 of the opamps? And what is the voltage reading at pin 5 of IC3?

What specific JFET is being used? And what are the values of RB1 & RB2?
Hello and sorry to resurrect an older solved thread but I can't seem to get my Proposition quite right. It works but it doesn't seem to have as much gain as it should. I suspect it's a compressor issue. Here are some readings:
Pin 8 of the TL072's are 17v so that should be good. I am getting 0.4v on pin 5 of IC3.
I'm using an old Fairchild J201 in a TO-92 type casing with the stock values of RB1 (6.2M) and RB2 (5.1M) D=8.6v, S=8.6v, G=6.1v. Vds=0.02v, Vdg=1.0V (fluctuates). Any help would be greatly appreciated.
 
Hello and sorry to resurrect an older solved thread but I can't seem to get my Proposition quite right. It works but it doesn't seem to have as much gain as it should. I suspect it's a compressor issue. Here are some readings:
Pin 8 of the TL072's are 17v so that should be good. I am getting 0.4v on pin 5 of IC3.
I'm using an old Fairchild J201 in a TO-92 type casing with the stock values of RB1 (6.2M) and RB2 (5.1M) D=8.6v, S=8.6v, G=6.1v. Vds=0.02v, Vdg=1.0V (fluctuates). Any help would be greatly appreciated.
If the main rail is ~+17V, that suggests you are using the chargepump in this build. If that is the case, there should be ~+8.5V at pin #7 of IC5, pin #5 of IC3 and pin #5 of IC2.
IC5.2 (specifically pin #7 of IC5) is the source for the VREF and should be ½ of what ever the measured main rail supply is. Double-Check resistors R101 & R102 to ensure they are indeed equal in value at 47K Ω.

As for the J201 and with the bias resistors at RB1 = 6M2 & RB2 = 5M1, the Vgs(Off) of that JFET needs to have a value of -1.00V, ±0.7V
 
Thank you so much for the reply! I really appreciate your time (and knowledge).
All IC's have approximately 8.5v on every pin except pin 8 (17v) and pin 4 (almost 0v). The only exception is pin 3 on IC1= 6.4v.

R101 &R102 are verified 47K

J201- "Vgs (off)" How do I achieve this "off" condition? I swear I measured -1.0v at gs yesterday and today I get -0.15v..........
 
Thank you so much for the reply! I really appreciate your time (and knowledge).
All IC's have approximately 8.5v on every pin except pin 8 (17v) and pin 4 (almost 0v). The only exception is pin 3 on IC1= 6.4v.

R101 &R102 are verified 47K

J201- "Vgs (off)" How do I achieve this "off" condition? I swear I measured -1.0v at gs yesterday and today I get -0.15v..........
With all opamps having ~8.5V on all legs but pin #8, it would seem there is a component value issue. Very carefully & methodically, re-examine every resistor to ensure they are of the correct value. There could also be an open ground issue somewhere, so a reflow of all soldering points may be in order.

I suggest starting a new thread and show some good clear photos of both sides of the PCB and the wiring.
 
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