op amp bias voltage divider - resistor values?

[JTEX]

Yes, but I believe @thunderaxe is planning to use that extra opamp for something else eventually. And in this particular, simple circuit, there's no real benefit from an opamp-buffered VREF, since nothing draws or sinks significant current to/from it.

 

[thunderaxe]

yes, that fourth op amp will definitely be used, for either an active baxandall tone section, or a clean blend buffer. speaking of the latter, would a separate buffer for the clean blend still be necessary if i instead took the clean signal from after the first gain stage?

 

[thunderaxe]

Could also save a component and do this...
View attachment 87366

if i were to use VREF in all the places you suggested, but wanted to create an asymmetrical clipping control that changed the bias voltage on the clipping stage op amp, i would need to create a separate voltage divider with its own conditioning cap and a pot to vary one half of the voltage divider, right?

also, would the clipping LEDs prevent the signal from hitting the rails no matter how far in one direction or the other i go?

 

[Paul.Ruby]

if i were to use VREF in all the places you suggested, but wanted to create an asymmetrical clipping control that changed the bias voltage on the clipping stage op amp, i would need to create a separate voltage divider with its own conditioning cap and a pot to vary one half of the voltage divider, right?

also, would the clipping LEDs prevent the signal from hitting the rails no matter how far in one direction or the other i go?

No. The clipping diodes are clipping at voltages that surround vref by 0.6v (depending on choice of diode). Vref is not relevant to the clipping symmetry. Asymetrical clipping would be by using two different diodes (or multiple diodes in series) to create the asymettry.

 

[darwin999]

if the 10uF capacitor on the sour grape's bias voltage is smallish, isn't the 220nF one on the dream fuzz tiny by comparison?

No - the Dream Fuzz's 1M in parallel with 220nF gives a ~0.7Hz filter corner.
The Sour Grape's RC filter corner is ~1.7Hz.
So quite comparable.

 

[darwin999]

The sour grape has a vref buffer and doesn't use it!

Not true, Vref is used in Q3 on the noninverting input.

And, the sour grape has a vref supply and then doesn't use it as the reference to the first op amp???

Hmm, that would give a very low input impedance at audio frequencies, not good.

 

[darwin999]

i noticed something interesting about the original op amp big muff -- the clipping stage op amp is biased by a voltage divider consisting of two deliberately mismatched resistors - 1M on the ground side and 820K on the V+ side, creating a slightly asymmetrical offset and, presumably, a slightly asymmetrical clipping as a result.

In both these circuits, the clipping comes from the diodes in the Q3 opamp's feedback loops - not from hitting the opamp's rails. Many/most opamps don't clip in the most audibly pleasant way when they hit their rails, and some even suffer from momentary latchups/etc.

 

[Paul.Ruby]

Not true, Vref is used in Q3 on the noninverting input.


Hmm, that would give a very low input impedance at audio frequencies, not good.

An op amp is shown buffering Vref and not using it. But the op amp is going to be doing something else later... Temporary schematic. I don't understand your low impedance comment. Of course it's low impedance. It would pass through a 1M resistor at each point it is used for bias. I drew this in the schematic snippets.

 

[darwin999]

An op amp is shown buffering Vref and not using it.

Semantic difference here, I guess, I view Vref as providing a reference voltage that is used by Q3.

I don't understand your low impedance comment. Of course it's low impedance. It would pass through a 1M resistor at each point it is used for bias. I drew this in the schematic snippets.

Exactly, it needs a large added resistance. So agreed.

 

[thunderaxe]

Could also save a component and do this...
View attachment 87366

would there be a danger of "polluting" VREF with signal by using it as a ground like this rather than purely as a bias voltage?

 

[JTEX]

It's OK to use Vref as signal ground, even in a more complex circuit with multiple Vref nodes, if it's properly buffered by an op amp or dedicated rail splitter IC. In one of my most complex circuits I couldn't make up my mind if I should use Vref or the negative rail as ground for a group of 3 opamps (a complex filter). I put in a jumper so I can switch between the two grounds. It made no difference at all either way. I ended up using the negative rail. It's now my default choice if the circuit's input and output are also referred to the negative rail, as is commonly the case with pedals/onboard electronics. Basically I'll use a buffered Vref as ground only if I can't avoid it.

 

[thunderaxe]

okay, how about without an IC buffer for VREF, but a large (100uF) filtering cap? here is my circuit, as it stands i've tied both the volume pots (VOLUME and CLEAN) lug 1 to VREF as signal ground. on the breadboard i tried using either VREF or 0V GND across a dedicated cap for each pot, and found that in either case i needed 100uF caps to cancel the signal out completely and not get any crosstalk, but i didn't hear any difference between using VREF or dedicated caps to GND. so i figured i may as well save two cats and just use VREF. i'm wondering if i can do the same here.

 

[thunderaxe]

i'm designing the PCB right now, and i don't have a buffered VREF, but i do have a 100uF filter cap for VREF, and i also made sure to route it so that the VOLUME and CLEAN pots that use VREF as signal ground (see schematic in the previous post) are on a separate track than any of the VREF-as-bias-voltage connections, and that they hit the filter cap before anything else so that they will get dumped to ground before they have a chance to interact with any of the VREF-as-bias-voltage connections. meanwhile the VREF-as-bias-voltage connections are connected to each other and hit the voltage divider resistors first.

so it basically goes:

(VOLUME & CLEAN)<--->filter cap<--->voltage divider resistors<--->bias voltage connections

do you think this is helpful? will it make any difference at all?
furthermore, if it is helpful, do you think i could do what @Paul.Ruby was suggesting above, and skip C6, tying that to the signal ground side of VREF instead?