Everyone has their own opinions on this subject, but I am not the biggest fan of putting my positive or negative power rail (in cases where a dual supply is used) on a copper pour. I don't have concrete evidence for why I avoid this other than trying to keep potential sources of noise away from sensitive signals. Using a single bulk capacitor in your power section isn't doing much (if any) filtering on your incoming power. Any noise introduced by your incoming power will surround all traces where your copper pour for the +VIN rail on your board. With high speed designs, it may be beneficial to handle copper pours like this, but not so much with low-level analog. Instead, I like to have ground pours on both sides of the board and keep power connections as isolated from high-impedance paths (your input traces, for example) as possible.
My newb 2 cents is that I had two versions of a board made recently, one with the best I could do, but still not optimally placed 9V routed trace with ground pours on both sides, and another with a 9V pour on the component side and ground pour on the reverse and then nicer/shorter routing for signal traces. It's a pretty high gain design, but the power pour version was much noisier with the gain/volume turned up.
With a layout redesign, it's difficult to say that the copper pours were the most significant contributor. If your design was high-gain and your high-impedance path was in close proximity to any amplified signal on the board, especially later stages, short traces aren't going to save the day. I'd be curious to see both layouts you did to see the differences.
Clean layout! I like the "flexible" resistor footprints. If you don't mind sharing, how are you handling the relay bypass? I see an SOIC-6 footprint, is that being used as the relay controller?
With a layout redesign, it's difficult to say that the copper pours were the most significant contributor. If your design was high-gain and your high-impedance path was in close proximity to any amplified signal on the board, especially later stages, short traces aren't going to save the day. I'd be curious to see both layouts you did to see the differences.
All I have left are the actual PCBs. I was in the habit of overwriting the layouts when I updated them. I'm saving independent versions now so I can look back at what I did. But yes, it was very much not a scientific test, lots of variables.
I've come back to this thread like a proud grandfather. Didn't expect it to still be rolling 2 and half years later! I love seeing the stuff some of you guys are making.
Quick question - any advice before I tackle my first stacked PCB design? I'm working on a designing a custom modded Univibe for someone and I'm going to need to stack PCBs to make it work with the pedal format I've chosen. I haven't even assembled a PedalPCB stacked design before so I'm flying a bit blind here trying to design one. I'd be keen to hear any lessons you've learned about PCB stacking.
Thanks so much, @Brett, your advice was really helpful! I finally got a chance to rework everything based on what you said. I figured I'd keep the separate schematic sheets since it seems like a good habit for larger circuits. I added values to the schematic (for the standard Meathead variant), ending up removing the LED and putting the diode in series:
And I reworked the PCB. I wasn't 100% sure what you meant about not doing a copper pour (I removed the power fill and moved the ground pours to the sides, like a breadboard). I tried to keep power to the top/right of the board, and then then input along the left. A big help in simplifying the layout process was adding separate colors for the different nets (via the appearance pane). This layout at least looks cleaner to me.
Great that you added values. Removing the CLR, LED, and using the SW pad may have been a mistake, if you plan to use the SW pad like most projects do. If you ground your SW in this configuration, you're going to short your power supply. You'd want to come off of your 9V pad with a CLR with the LED in series (anode facing CLR), then the SW pad.
And I reworked the PCB. I wasn't 100% sure what you meant about not doing a copper pour (I removed the power fill and moved the ground pours to the sides, like a breadboard). I tried to keep power to the top/right of the board, and then then input along the left.
You could just make the ground pour on the back cover the entire board in one polygon rather than separate rails and traces going to either. The way you have it now won't give you much benefit and may increase your resistance to ground in some areas.
It does look like you've given things a little more room, just be careful with the trace running from C1 to C2 that passes beneath C5 and the trace running from R5 to C5. C5 carries the most amplified signal in the circuit. You may want to try to rearrange those caps or make sure you have ample space between any copper (traces or pads) connecting those nets.
Ah, I misunderstood your previous post. I thought you were saying that pours for power or ground were bad. But it sounds like you were just saying power, or power and ground together.
I had just enough room for the LED and resistor in the corner, so I've added those back in.
Thanks for the advice on the C5 capacitor. I tweaked the layout and now there's more space between C2 and C5.
Out of curiosity, is there any way to test or "score" these layouts for the kind of interference you're referring to? Or are there any guides you'd recommend? What's killing me is that right now it seems I'd have to learn all this by experience, but "experience" takes at least 2 weeks of JLC build+shipping+build on my end, before I figure out if I messed up - and even then I'm just as likely to attribute it to a noisy circuit rather than my own poor layout (or if I attribute it to my layout, I might not know what's causing the problem). As an example, I'm not sure how I'd begin to assess the impact of moving or flipping C5 (below), to avoid routing a trace under the capacitor itself and to put the trace next to it. Perhaps there's no impact, or perhaps it adds a lot of noise...
Most of the calculators I’ve seen for stuff like this are more focused on signals with far higher frequencies or much larger currents than we deal with in pedal building. I would be very interested to know too if I’ve missed calculators that would apply! Douglas Self covers some of this in Small Signal Audio Design but a lot of it is open ended
I don't think there's an all-in-one type tool to do this in KiCad, or at least I haven't seen one. If you understand the schematic and can identify nets that are susceptible to crosstalk, high-impedance sources for example, you can use the Inspect > Net Inspector for insights into how long the traces are on that net. Long traces can act like antenna, so this tool gives you *some* insight, but it's not conclusively going to tell you if you did something wrong. Another tool that may give you some insight is the Parasitics add-on (available on the plugins menu). I've never used it or downloaded it, but it appears to measure trace parameters to give you data that may assist in reducing potential crosstalk.
I'm certain that more knowledgeable PCB engineers use software that can provide some quantitative measurement of potential issues between traces, but alas, I am not one of them. I do this because I enjoy it and the majority of my learning has been through practice and the school of hard knocks. We are designing low-level analog signal circuit boards and from what I've learned so far, these designs are pretty forgiving as long as you take basic precautions when doing a layout (most of which I've already mentioned).
I've only done one of these so far, but I can share a few things I took into consideration when doing the layout:
1. 7mm capacitor height is about the max I could use with the headers and standoff I used. I had to make sure that any electrolytic capacitors used the correct diameter footprint and pad spacing because low profile sometimes means a different footprint. I used Kemet ESS series caps on my build. If you're interested in looking at those, here's the datasheet.
2. I tried to strategically place components on the top board so that the pads for the components did not overlap any electrolytic capacitors on the bottom board. I didn't want to accidentally puncture any of my electrolytic capacitors when I sandwiched the boards together.
3. When I did the layout in KiCad, I actually designed both boards on the same "Master" project so I could ensure the alignment of the boards and standoffs was correct. I then duplicated the project twice and had one project for the top board and one for the bottom before generating gerbers to send to the fabricator. Doing this gave me all sorts of DRC errors (which I could have fixed), but I knew the design was DRC-compliant in the Master project before splitting things up.
4. One advantage to stacked boards is the opportunity to isolate parts of the circuit that may not interact well with others. For example, having the power supply and LFO to one board and the audio on the other. If you're mindful with your headers, you could also create a sudo star ground between the different parts of the circuit and the voltage input source.
5. Another consideration that relates to isolation of conflicting circuits in the overall design is which side of the board your traces are on. For example, if you place your LFO and power on the bottom board and route the traces on the bottom of the bottom board and your audio circuitry on the top board with top layer traces, you could have two layers of ground separation between them. It's just something to consider.
If you have any specific questions that you think I might be able to help with, feel free to tag me and I'll help the best I can .
Here's a snapshot of the boards I designed for the MOS-TRON Envelope Filter project I did in case you'd like to see them:
A few pictures showing the stacked boards can be seen in the build report I posted for the project as well.
Wow @Brett, what a treasure trove of information. I will probably re-read this a lot, thanks.
You've already anticipated my thinking about having the LFO and power section of the Univibe on a separate board to the audio circuit, and with their own separate ground arrangements, connecting as close as possible to the +/- pads.
I so appreciate you taking the time to share your learning with me.
Clean layout! I like the "flexible" resistor footprints. If you don't mind sharing, how are you handling the relay bypass? I see an SOIC-6 footprint, is that being used as the relay controller?
Thanks a lot. Yes, I use the smallest PIC available, PIC10F322. I was inspired by an old @bean design. I have implemented four modes of switching that can be cycled on power-up: latching, momentary (non-latching), momentary after long press, and switched on after power-up. Other than that, there is nothing fancy. If I want to use the magnetic switch, the three contacts at the bottom can be used for the hall sensor.
I can share the schematic but there is nothing you could not figure out if you know how to connect the switch to the MCU input.
Well, I had my first batch of PCBs arrive yesterday: the pcb I'd posted before, my own footswitch daughterboards, and a board with the Dyl-Ei Fuzz Apprentice. I quickly threw together one of each, and put the Dyl-Ei in a box.
Everything worked! And it all sounds good! Thanks @Brett, again, for all the feedback.
I had a few glitches - I got one pot knob reversed, had a poor footprint for a 2N3904, put a film cap footprint instead of an electrolytic. But I'm pretty happy for a first try.
I've got about 15 separate projects on the go, but this is a Son of Screamer/Eternity hybrid with switches altering the high and low frequency response of the circuit. The hope is to get the best of both circuits in one. I'm building it for Christmas for my teenage daughter who is learning guitar at a fierce rate and loves all things John Mayer (hence the pedal name and cribbed lyrics). I decided it would be more fun to build her something flexible rather than going for a boring vanilla TS10 replica. I am pretending not to be bothered about the symmetry issues caused by the different switch and cap sizes on the outside rows haha.
I was definitely going to enlarge those 47N caps before getting the board fabricated But now I am going to have a long hard think about how to make the smaller switch footprint look bigger!
I was definitely going to enlarge those 47N caps before getting the board fabricated But now I am going to have a long hard think about how to make the smaller switch footprint look bigger!
Wondering if I can get some more feedback (just some basic feedback, doesn't need to be in-depth). These layouts aren't done (I need to add to polish a little and add labels, but the DRC passes). They're on the more complicated side for me. I've now done ~10 overdrives to various stages of completion, but those have fewer components.
I'm mostly wondering if the long traces and some of the clutter is likely to cause noise. These were fairly loopy schematics, but I did the best I could.
And then there's a Perfectly Usable Phaser (4-stage). As an example, I'm curious, in the top-left corner, whether having the traces cross is more likely to cause noise than routing the blue trace above the switch (a somewhat longer route). I don't have any sense for these things. Maybe it's a marginal difference but all the crossings add up?
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But now I am going to have a long hard think about how to make the smaller switch footprint look bigger!
