I think my post 7 is still the cleanest implementation. You’d breake the signal path after R15 of each board and route those switches. I could draw it more clearly on the schematic.
In this case, in parallel mode, IC2.2 of the lower circuit mixes the three signals at once (dry, delay1, delay2).
In this case, in parallel mode, IC2.2 of the lower circuit mixes the three signals at once (dry, delay1, delay2).