IIRC:
the SPDT chooses the LFO for phaser B, A or B - it can be independent or it can be controlled by phaser A. I think it's A in the up position.
The DPDT chooses whether the LFOs are synced or not - Normal in the up position, reverse in the down position.
I gleaned this from build reports, I still haven't wired up my board, so I might be wrong