Ever had a JLCPCB manufacturing defect?

[MattG]

So tonight I finished up a pedal based on a PCB of my own design. And when I powered it on... nothing! After some debugging, I found that one of the signal nets was shorted to ground. I narrowed it down to what I assumed were three possibly bad components. Fortunately, this part of the circuit is optional (it's a RF filter I wanted to test out). So I bypassed those components with a jumper wire, and it worked.

What I thought was interesting was, even after removing the suspect components, the net they shared (i.e. leads connected by the same trace) still showed continuity to ground.

So I got one of the bare PCBs and checked - same issue! In fact, all four of the unpopulated PCBs have the same issue - a net that should not have continuity to ground is in fact shorted to ground.

Here's a picture of the PCB with only the copper layers visible. This is a two layer board, with top (red) and bottom (blue) ground planes. The net I circled in yellow is the one that's shorted to ground. Kicad would throw a DRC error if I short two distinct grounds. And just now, I dropped a ground via on that trace, ran the DRC, and it indeed throws an error.

So this leads me to believe that either (1) the Gerbers Kicad generated are bad, or (2) JLCPCB had a manufacturing error.

Anyone ever experienced anything like this? @Robert, I believe you've ordered a lot of PCBs from JLC, has something like this ever happened to you?

Any further way I can be sure if it's a fabrication issue or a Kicad software issue?

 

[z2amiller]

Is it possible that you dragged one of those components a tiny bit, and generated your gerbers before running a zone refill?
If you move a component just a little bit, it's easy to drag it into a ground plane fill. (ask me how I know).
The default when you run DRC is to fill zones first, so if yougo back and run DRC now it probably looks fine. (ask me how I know)

JLC should still have the gerbers that you uploaded so you might be able to see if there's an overlap somewhere in the files
they used -- it should be easier to spot since you know right where the defect is.
I think you can get to the gerbers from the order history page by clicking on the little photo of your board, there's a tab
for 'layers'.

 

[MattG]

Is it possible that you dragged one of those components a tiny bit, and generated your gerbers before running a zone refill?
If you move a component just a little bit, it's easy to drag it into a ground plane fill. (ask me how I know).
The default when you run DRC is to fill zones first, so if yougo back and run DRC now it probably looks fine. (ask me how I know)

I've made that mistake before (submitted Gerbers with zones not filled properly), so ever since I refill zones like it's my job. But you're exactly right, I somehow managed to generate those Gerbers with non-refilled zones. I actually loaded up the same gerber zip file I sent to JLC directly in Kicad, and it's plain as day!

The funny thing is - I also managed to swap the position of two pots, so even before this issue, I was planning on a board revision.

 

[z2amiller]

b b b b b b b b b b

I dunno what you use to generate the gerbers, but the Bouni tools have a plugin that works very well which you
can configure to force-fill zones before export. Of course that doesn't help if you fill the zones and cause some kind
of DRC problem, but at least it's something. It'd be nice to have a plugin that filled zones, and also forced a DRC
run and that all errors are cleared or acknowledged.

I should add this to my pitfalls doc

 

[Sturdag Lagernathy]

I've done this exact thing more than I care to mention. Last time, though, Jlcpcb sent me an email notifying me of the error! I always go the cheapest route, with no "in-house inspection", so not sure why a tiny fill layer issue caught attention. In the past, they have completely ignored such small issues on my boards..