EP Booster – Is this 18V toggle behavior normal?

[mrwolf]

Hi everyone

I recently built the EP Booster, and it works great! However, I wanted to double-check whether the 18V toggle is behaving as expected.
When I switch from 9V to 18V, the guitar signal cuts out for about 1–3 seconds before gradually fading back in, almost like turning up a volume pot.

My guess is that this happens while the charge pump is building up the voltage.

Is this normal behavior, or could there be something wrong with the charge pump section?

Thanks

 

[z2amiller]

Looking at the schematic, this looks totally normal. It looks like it's not really meant to be switched as a live control.

The main issue is that when you switch VCC from 9V to 18V, all of the caps in the circuit are charged assuming 9V.

Two major places - the VREF cap is charged to 4.5V to bias halfway between 9V and GND, and when you flip
the switch, VCC changes immediately to 18V but the VREF capacitor has to charge up to 9V (1/2 VCC) thru the
10K resistor network which takes ~1/4 a second.

Worse, the big caps sitting at the source of the JFET are charged assuming 9V, so when you toggle VCC to 18V
those guys have to charge thru the JFET and are limited by the bias network around it - I bet it's worse when
the 'FAT' switch is in whatever position selects the chonky 100u cap.

(I wouldn't be surprised if there wasn't a cutout when flipping the FAT switch for the first time, either -- which you
could actually fix with something like bodging a 1M+ bleed resistor between each of pin1+2 and then pin2+3
of the fat switch to trickle charge the caps)

 

[anevilspar7an]

My thought process on this switch is a set and forget thing. You select which voltage you want to run and then keep it there. You shouldn't be switching power like this with the circuit on in general.

 

[mrwolf]

Looking at the schematic, this looks totally normal. It looks like it's not really meant to be switched as a live control.

The main issue is that when you switch VCC from 9V to 18V, all of the caps in the circuit are charged assuming 9V.

Two major places - the VREF cap is charged to 4.5V to bias halfway between 9V and GND, and when you flip
the switch, VCC changes immediately to 18V but the VREF capacitor has to charge up to 9V (1/2 VCC) thru the
10K resistor network which takes ~1/4 a second.

Worse, the big caps sitting at the source of the JFET are charged assuming 9V, so when you toggle VCC to 18V
those guys have to charge thru the JFET and are limited by the bias network around it - I bet it's worse when
the 'FAT' switch is in whatever position selects the chonky 100u cap.

(I wouldn't be surprised if there wasn't a cutout when flipping the FAT switch for the first time, either -- which you
could actually fix with something like bodging a 1M+ bleed resistor between each of pin1+2 and then pin2+3
of the fat switch to trickle charge the caps)

Thank you very much for the explanation I learn a thing or two from your reply very interesting.