DEMO Viib with togglydoos

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DGWVI

Well-known member
Build Rating
5.00 star(s)
Another one of these wobbly guys for a commission.

  • Rate pot increased to 500kC for a wider range of slower speeds
  • C22 & C23 are 33n (higher speed range than stock)
  • DPDT on-off-on to add 220n caps in parallel with C22/23 (slows down the speed of the LFO considerably). Right position adds the 330n only to C22 or a warbly tape asymmetry, middle position is fast, Left is slow
  • Bottom toggle adds an 82p in parallel to C24. Wires tack soldered to pins 5&7 of the clock chip to make the whole thing easier to put in the enclosure.
  • IC1 is LF353 because that's what I have a ton of

1000030021.jpg 1000030015.jpg 1000030030.jpg

Here's a sketch of the speed toggles wiring
1000030027.jpg


Fairly simple build, nothing to calibrate other than the BBD bias. I have the delay time trim set to eliminate whine introduced with the additional clock cap.
 
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